Problem: Stress, Warpage in Silicon Wafers during Production
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During the growth of EFG and string ribbon silicon, creation of a high thermal gradient is unavoidable at the solid-melt interface.
Significant curvature in the cooling profile is also unavoidable and this curvature will lead to appreciable thermal stresses.
Residual stresses in the silicon may cause mechanical failure during processing, affect the geometry stability of silicon-based devices, and change the optical or electrical properties of devices.
Tensile residual stresses in silicon will eventually lead to degraded mechanical performance, stress corrosion cracking, shortened lifetime and even catastrophic failure.
Residual stresses may also cause warpage or buckling when the single crystal ingots, cast blocks or EFG/ribbon tubes are cut to wafers, so that further processing for cell fabrication is difficult.
Furthermore, the perimeter of the wafer, and in some cases the front and back surfaces, may also contain micro-cracks which will eventually propagate and fracture the cell in handling during subsequent device fabrication since cracks will propagate in the region of tensile residual stresses.
As sheet becomes thinner, the grown-in residual stresses, coupled with the stresses imposed during manufacturing, presents a formidable challenge.
In addition, surface cracks can be generated during the polishing or preparation stage of the wafer. These cracks can severely re-orient the residual stress and its impact would present new challenges.
Significant curvature in the cooling profile is also unavoidable and this curvature will lead to appreciable thermal stresses.
Residual stresses in the silicon may cause mechanical failure during processing, affect the geometry stability of silicon-based devices, and change the optical or electrical properties of devices.
Tensile residual stresses in silicon will eventually lead to degraded mechanical performance, stress corrosion cracking, shortened lifetime and even catastrophic failure.
Residual stresses may also cause warpage or buckling when the single crystal ingots, cast blocks or EFG/ribbon tubes are cut to wafers, so that further processing for cell fabrication is difficult.
Furthermore, the perimeter of the wafer, and in some cases the front and back surfaces, may also contain micro-cracks which will eventually propagate and fracture the cell in handling during subsequent device fabrication since cracks will propagate in the region of tensile residual stresses.
As sheet becomes thinner, the grown-in residual stresses, coupled with the stresses imposed during manufacturing, presents a formidable challenge.
In addition, surface cracks can be generated during the polishing or preparation stage of the wafer. These cracks can severely re-orient the residual stress and its impact would present new challenges.
Our Solution: Rapid High-Resolution Measurement
With our technology, we are able to measure full-view global warpage of a 10' wafer in 1 single shot.
Full view scan
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Full view profile
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Zoomed in profile
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Slope
Curvature
Twist
